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Recently, SoftBank and Intel have jointly developed a new AI-specific memory chip aimed at significantly reducing power consumption to provide more efficient support for Japan's AI infrastructure. According to Nikkei Asia, the goal of their cooperation is to design a new type of stacked DRAM chip. The wiring method of this chip will be different from the popular High Bandwidth Memory (HBM) on the market, expected to reduce power consumption by about 50%. Image source note: The image was generated by AI, and the image rights service provider is Midjourney.

When interacting with large language models like ChatGPT or Claude for a long time, have you ever encountered embarrassing situations where the conversation content suddenly forgets? This is not intentional on the part of AI, but rather limited by the inherent context window restrictions of large language models. Regardless of whether it's an 8k, 32k, or 128k token capacity, once this threshold is exceeded, the previous conversation content will be truncated and lost, seriously damaging the interactive experience. Recently, a company called Supermemory has launched a disruptive technology—Infin

The JEDEC Solid State Technology Association has announced the highly anticipated release of the High Bandwidth Memory (HBM) standard – HBM4. Evolving from the HBM3 standard, HBM4 aims to further accelerate data processing while maintaining higher bandwidth, energy efficiency, and greater capacity per chip or stack, to meet the demands of efficient processing of large datasets and complex computations. The HBM4 standard introduces several key technological advancements, suitable for applications in generative AI, high-performance computing, high-end graphics cards, and servers. Firstly, HBM4 significantly increases bandwidth...

According to Qichacha APP, Huawei Technologies Co., Ltd. recently published a patent for "A Method and Apparatus for Generating AI Models." The patent abstract indicates that this technology, related to the field of artificial intelligence, can improve the efficiency of generating AI models and reduce resource consumption. The method involves: the first processor, based on the execution time of each operator in the multiple operators of the AI model, the memory occupancy of the second memory of the second processor during the operation of each operator, and the memory offloading time, constructs a target optimization with the operation instruction information as the optimization variable.

Recently, Google announced that its Gemini AI has officially launched the 'Global Memory' feature. This new function enables the AI to remember all conversations with users, aiming to provide a more personalized and thoughtful service. According to the official introduction, users will no longer need to specifically revisit past conversation records while interacting with the AI, as it can seamlessly pick up from previous discussions, enhancing the fluidity of communication. To experience this feature, users need to subscribe to Gemini Advanced services.

In today's development of artificial intelligence (AI), the speed of data transmission has become a significant bottleneck hindering its progress. To break through this barrier, a research team led by the University of Michigan (U-M) is developing a brand new chip connection system that uses optical waves instead of traditional cables for data transmission. This innovation is expected to address the 'memory wall' problem that limits computational speed and promote further growth of AI models. The project has received a $2 million grant from the National Science Foundation's Future Semiconductor program, with participation from the University of Washington and Penn State.

Google Research recently announced the innovative 'Titans' series model architecture, achieving a groundbreaking 2 million token context length through bionic design, with plans to open-source related technologies in the future. The core innovation of this architecture is the introduction of a Deep Neural Long-Term Memory Module, inspired by the human memory system. Titans cleverly combines the rapid response capability of short-term memory with the persistence characteristics of long-term memory, while utilizing an attention mechanism to handle immediate context, forming an efficient information processing system.

At the recent CES event, NVIDIA CEO Jensen Huang pointed out that Samsung Electronics is facing some difficulties in the production of new AI memory chips. These new memory chips, known as High Bandwidth Memory (HBM), are crucial for the next generation of AI systems powered by NVIDIA chips. Huang mentioned at the press conference that Samsung's production speed for HBM is slower compared to its competitor SK Hynix.

As businesses increasingly adopt large language models (LLMs), improving the accuracy of model knowledge and reducing hallucination phenomena has become a significant challenge. Researchers at Meta AI have introduced a 'Scalable Memory Layer' in a recent paper, which may provide a solution to this issue. The core idea of the scalable memory layer is to add more parameters to the LLMs without increasing computational resources during inference, thereby enhancing their learning capabilities. This architecture is suitable for storing large amounts of factual knowledge while maintaining...